Job Description
WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_
THE ROLE:
We are looking for a dynamic, energetic Systems Design Engineer to join our growing team. As a key contributor to the success of AMD’s product, you will be part of a leading team to drive and improve AMD’s abilities to deliver the highest quality, industry leading technologies to market.
THE PERSON:
As a Senior Staff Systems Design Engineer , you will drive balanced, scalable, and automated solutions. In this high visibility position, your software systems engineering expertise will be necessary towards p roduct development, definition, and root cause resolution. A Machine Learning (ML) Compiler SW Engineer in the AI group plays a crucial role in developing SW toolset to deploy cutting-edge ML inference on AMD’s Neural Processing Units (NPU). You will be responsible for designing, and implementing compiler optimization passes that translate Gen-AI ML inference models like SDXL-Turbo, Llama2, Mistral, etc. into low-level code for compute and dataflow on NPUs. Your work will directly impact the efficiency, scalability, and performance of our ML applications.
RESPONSIBILITIES :
Design tiling algorithms to map ML operators on AI Engine accelerator which powers AMD XDNA NPU.
Collaborate with Architecture and runtime software teams to develop software stack for enabling cutting-edge inference models on NPU.
Implement loop tiling, and buffer allocation strategies for efficient compute and DRAM access.
Develop back-end optimization passes to convert dataflow IR into driver calls for different NPU generations.
Testing and validation of optimized kernels and dataflow schedules using CPU models.
Develop and maintain unit tests and integration tests for the compiler to support different generations of HW architectures.
Enable detailed profiling and debugging tools for analyzing performance bottlenecks and deadlocks in the dataflow schemes.
Stay up-to-date on the latest advancements in ML compiler technology and hardware architectures.
Lead technical projects and mentor new grads and/or interns
PREFERRED EXPERIENCES :
Strong understanding of ML compiler optimizations (front-end, middle-end, back-end).
Experience with machine learning frameworks (e.g., TensorFlow, PyTorch).
Experience working with on GPUs, TPUs, NPUs, or vector processors is a must.
Experience with ML models such as CNN, LSTM, LLMs.
Excellent programming skills in Python, C++, or similar languages.
A passion for innovation and a strong desire to push the boundaries of machine learning performance.
ACADEMIC CREDENTIALS:
Master's degree or PhD. in Computer Science, Engineering, or a related field (or Bachelor's degree with significant experience).
LOCATION:
San Jose, Ca.
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Benefits offered are described: AMD benefits at a glance .
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
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